Responsibilities:

• Adapt ASIC RTL designs for implementation on FPGA platforms, ensuring optimal performance and compatibility.
• Collaborate extensively with the design team to thoroughly understand specifications, architectures, and micro-architectures.
• Work in tandem with the software team for the seamless porting of software onto the emulation platform.
• Design and implement test cases for validating new hardware features at both module and system levels.
• Establish a robust infrastructure for functional and performance validation, including NAND characterization and manufacturing testing processes.
• Conduct regular regression tests, and efficiently identify and troubleshoot failures within the validation environment. Assist in replicating issues in simulation environments for further analysis.

Requirements:

• 3+ years of industry experience of being emulation engineer
• Master’s degree in Electrical Engineering, Electrical and Computer Engineering, or a related field.
• In-depth knowledge of computer storage, networking, and familiarity with high-speed interface standard protocols (e.g., PCI Express, DDR, NAND Flash).
• Solid foundation in Verification principles and advanced debugging techniques.
• Demonstrated expertise in transitioning RTL designs to FPGA platforms (experience with HAPS, Zebu, Palladium, etc., is preferable).
• Proficiency in programming with C/C++ and scripting in Python.
• Strong team collaboration skills coupled with excellent communication abilities.