• 5+ years of relevant post-silicon validation experience.

• Proficiency with lab equipment, logic analyzers, and oscilloscopes.

• Expertise in Python and C.

• Thorough understanding of Ethernet PHY / PCS / MAC standards (e.g. IEEE 802.3) and technologies.

• Proven success in functional and electrical bringup and validation of PAM4 and NRZ Ethernet interfaces on multiple ASICs.

• Hands-on experience with traffic generators such as Spirent and Ixia