IC Package Mechanical FEA Engineer:

FULL-TIME with Our Fortune 500 Client: Direct-Hire:

No H1B assistance at this time.

Experienced package mechanical FEA engineer for very-large and complex packages for industry-leading ASICs.

Developing high-performance package designs for ASICs for artificial intelligence (AI), networking, high-performance computing (HPC), and 5G base stations.

Co-packaged fiber-optic transceivers and connectors and complex chip stacking (3DIC, hybrid copper bonding, heterogeneous integration, etc).

Optimize unique multi-chip-module (MCM) packages and mainstream flip-chip BGA (FCBGA) packages.

Collaborate with the R&D and manufacturing teams to influence the mechanical design of new ASICs, and make engineering trade offs with warpage, stress, reliability, cost, thermal and electrical performance, etc..

RESPONSIBILITIES:

• Design responsibility for mechanical design aspects of ASIC packages
• Use advanced FEA to quantify and optimize reliability and manufacturing
• Measure and experiment to validate understanding and improve model accuracy
• Collaborate closely with package designers, reliability and manufacturing partners (internal and external)

EDUCATION/EXPERIENCE & REQUIREMENTS:

• Bachelors in Mechanical Engineering or similar field and 8+ years of experience in FEA modeling or Masters in Mechanical Engineering or similar field and 6+ years of experience in FEA modeling or PhD in Mechanical Engineering or similar field and 3+ years of experience in FEA modeling.
• Ability to evaluate complicated numerical simulation results against first principles such as strength of materials solutions
• Ability to calibrate modeling and results with existing empirical data
• Perform mechanical testing
• Devise lab scale tests to validate analyses
• Seek mechanical solutions at the intersection of manufacturing limitations, required reliability and customer expectations
• Ansys Classic/Mechanical and Siemens FloTherm experience is preferred. Equivalent tool is OK