Role Brief:

My client is looking for an experienced RTL/ASIC Design Engineer to join their team to help write micro-architecture specifications as well as drive chips from product definition to production.

Skillset:

· BS/MS degree with 10+ years of ASIC Design Experience.

· Strong background with Design Synthesis, SDC Constraints, and Timing Analysis.

· Proficient using System Verilog.

· Preferred: Background with PCIe/CXL protocols.

This an exciting opportunity to join an exciting Semiconductor company helping to drive advancements in the latest technology. If you are looking for an opportunity that will provide you with career progression within a successful team, then this is one for you.

Location: San Jose, CA

For immediate consideration please send your resume to