Senior Talent Acquisition Specialist @ PRI Global | Technical Recruiting Expert | LinkedIn Certified

Hello,

We are looking for Digital Design Engineer with experience in RTL coding and have worked on a design from scratch. Please refer to the job details below. If interested, drop your resume at .

Job Title: Digital Design Engineer

Location: CA (REMOTE)

Duration: 12 Months Contract

Must Have Skills:

1. 4+ years of experience as a Digital Design Engineer.
2. Recent experience with IP RTL coding within the past 2-3 years , specifically for ASIC (Per CWAM, anything beyond would be a challenge).
3. Experience having worked on a design from scratch – code from the ground up (outline/provide project work, if available).
4. Experience in RTL coding and coding for low power in ASICs.
5. Experience in digital design µArchitecture.
6. Strong experience with Verilog and System Verilog coding.
7. Perl, Tcl, and Python (or similar) scripting experience.

Role Responsibilities:

1. Ensure RTL written meets quality checks like Lint/CDC/RDC.
2. Collaborate closely with design team members, technical leads, and the architecture team to ensure the block meets the power and performance requirements.
3. Collaborate closely with the verification team to develop test plans and review test coverage.
4. Supervise the RTL-to-GDS flow and assist with synthesis and timing closure.
5. Work with FPGA engineers to perform early prototyping.
6. Support hand-off and integration of blocks into larger SOC environments.