Job details are Shared below:
Job Title: Post Silicon Validation Engineer Ethernet
Location: 3000 Tannery Way, Santa Clara, CA (hybrid)
Job Duration: 6+m Contract with potential for conversion
Primary Skills:
- 5+ years of relevant post-silicon validation experience
- Thorough understanding of Ethernet PHY / PCS / MAC standards (e.g. IEEE 802.3) and technologies
- Hands-on experience with traffic generators such as Spirent and Ixia Demonstrated
- Expertise in Python and C
- Proficiency with lab equipment, logic analyzers, and oscilloscopes
- Proven success in functional and electrical bringup and validation of PAM4 and NRZ Ethernet interfaces on multiple ASICs
- Demonstrated ownership and independence in planning, analyzing, debugging, driving vendors, and reporting status.
- Strong collaboration and communication skills.
Certifications & Licenses:
- Proficiency with lab equipment, logic analyzers, and oscilloscopes
Required Skills:
- OSCILLOSCOPES
- ETHERNET
- VALIDATION ENGINEER
- PYTHON
- LOGIC ANALYZERS
Additional Skills:
- PCS
- ASIC
- APPLICATION-SPECIFIC INTEGRATED CIRCUIT GENERATORS ASICS IEEE DEBUG MAC
Responsibilities:
- Develop and run post-silicon validation tests and associated scripts for successfully validating Ethernet network interfaces (PHY / PCS / MAC).
- Analyze and debug test failures independently to identify root cause.
- Debug complex cross-functional issues with ASIC, system hardware, and software engineers.
- Build powerful programs in Python and C to automate testing, regression, and debugging
Qualification:
- BS or MS in EE, CE, or CS or equivalent experience.
- Minimum Degree Required: Bachelor's Degree.
Please respond at the earliest to speed up the interview process. I will contact you if I need further details.
Amit Bundele
Technical Recruiter
Phone : 669-319-4167
Email :
San Jose, California