Tech Mahindra is an Indian multinational information technology services and consulting company. Tech Mahindra is a US$6.0 billion company with over 148,000 employees across 90 countries.

Job Title: FPGA UVM Verification Engineer

Location: Phoenix, AZ (from Day 1 onsite)

The pay range for this role is $84k- $120k per annum including any bonuses or variable pay. Tech Mahindra also offers benefits like medical, vision, dental, life, disability insurance and paid time off (including holidays, parental leave, and sick leave, as required by law). Ask our recruiters for more details on our Benefits package. The exact offer terms will depend on the skill level, educational qualifications, experience, and location of the candidate.

Job Description:

• Bachelor’s degree from an accredited institution in a technical discipline such as the sciences, technology, engineering or mathematics
• 2 + years of FPGA Design or Verification Experience
• Degree in Electrical Engineering or Computer Engineering
• Strong experience in VHDL, Xilinx FPGA/SOC development, ASICs
• Some software coding skills, preferably using C
• MATLAB/Simulink design and simulation skills
• Some LabVIEW experience
• Scripting language skills – e.g., Perl, Shell, TCL
• Knowledge of simulators, STA tools, synthesis, and routing tools, AMBA, I2C, SPI

“Tech Mahindra is an Equal Employment Opportunity employer. We promote and support a diverse workforce at all levels of the company. All qualified applicants will receive consideration for employment without regard to race, religion, color, sex, age, national origin, or disability. All applicants will be evaluated solely based on their ability, competence, and performance of the essential functions of their positions with or without reasonable accommodations. Reasonable accommodations also are available in the hiring process for applicants with disabilities. Candidates can request a reasonable accommodation by contacting the company ADA Coordinator at ”