ASIC Verification Engineer (Block and IP level verification)Creation of verification environments, pre-silicon functional verification at the block, chip and system level, reference modeling and post-silicon validation.Develop environment and test cases to verify hardware security designs (previous security experience not required but a plus).Required:5+ years of experience in design verification with a proven track record of full verification cycle on complex SoC IPs and/or systems.System Verilog and UVMIn depth knowledge of verification principles, testbenches, stimulus generation, UVM, and coverageSubstantial background in creating simulation environments, developing tests, and debugging designsSolid understanding of chip and/or computer architectureScripting language such as Python, Ruby, or PerlDesired:The ideal candidate is also passionate in developing systematic and efficient methods to detecting hardware/software vulnerabilities.Hardware security IP and SOC level verificationExperience with secure hardware design for embedded systemsFirmware development experience, with secure and non-secure boot flowExperience with hardware emulation or FPGAsSeniority level

Mid-Senior levelEmployment type

Full-timeJob function

OtherIndustries

IT Services and IT Consulting

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