We are seeking an experienced Front-End Silicon Design Engineer who is responsible for front end design tasks at the block and sub-system levels. These tasks include RTL design, sub-system integration, RTL generation via 3rd party tools, and repository management.

Responsibilities:

• Responsible for various integration tasks at the block level
• Responsible for various integration tasks at the sub-system level
• Responsible for generation of cores (Cadence Tensilica)
• Responsible for the generation and integration of NOCs (Synopsys and Arteris)
• Manage repos for shared collateral across design teams

Skills:

• Knowledge of the ARM architecture
• Knowledge of Cadence Tensilica cores
• Strong design knowledge of the industry standard bus interfaces such as AMBA AXI protocol
• Worked with leading-edge technologies 5 nm or smaller.
• Knowlege of GIT repositories

Education/Experience:

• Bachelor’s degree in Electrical Engineering, Computer Engineering, or related degree required.
• 8+ years of experience in hardware design
• 7+ years expertise in Digital Design including microarchitecture specification development, RTL coding in Verilog/System Verilog and Clock Domain Crossing (CDC)/LINT closure.

About Brickred Systems:

Brickred Systems is a global leader in next-generation technology, consulting, and business process service companies. We enable clients to navigate their digital transformation. Brickred Systems delivers a range of consulting services to our clients across multiple industries around the world. Our practices employ highly skilled and experienced individuals with a client-centric passion for innovation and delivery excellence.